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  MP2633 1.5a single cell switch mode battery charger with power path manageme nt and boost otg MP2633 rev. 1.05 www.monolithicpower.com 1 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. the future of analog ic technology description the MP2633 is a highly-integrated, flexible, switch-mode battery charge management and system power path management device for a single-cell li-ion and li-polymer battery used in a wide range of portable applications. the MP2633 has two operating modes?charge mode and boost mode?to allow management of system and battery power based on the state of the input. when input power is present, the device operates in charge mode. it automatically detects the battery voltage and charges the battery in the three phases: trickle current, constant current and constant voltage. other features include charge termination and auto- recharge. this device also integrates both input-current limit and input-voltage regulation in order to manage input power and meet the priority of the system power demand. . in the absence of an input source, the MP2633 switches to boost mode through the mode pin to power the sys pins from the battery. the olim pin programs the output current limit in boost mode. the MP2633 also allows an output short-circuit thanks to an output disconnect feature, and can auto-recover when the short circuit fault is removed. the MP2633 provides full operating status indication to distinguish charge mode from boost mode. the MP2633 achieves low emi/emc performance with well-controlled switching edges. to guarantee safe operation, the MP2633 limits the die temperature to a preset value 120 o c. other safety features include input over-voltage protection, battery over-voltage protection, thermal shutdown, battery temperature monitoring, and a programmable timer to prevent prolonged charging of a dead battery. features ? 4.5v-to-6v operating input voltage range ? power management function integrated input-current limit and input-voltage regulation ? up to 1.5a programmable charge current ? trickle-charge function ? selectable 3.6v/ 4.2v charge voltage with 0.5% accuracy ? negative temperature coefficient pin for battery temperature monitoring ? programmable timer back-up protection ? thermal regulation and thermal shutdown ? internal battery reverse leakage blocking ? reverse boost operation mode for system power ? up to 91% 5v boost mode efficiency @ 1a ? programmable output current limit for boost mode ? integrated short circuit protection for boost mode applications ? sub-battery applications ? power-bank applications for smart-phone tablet and other portable device all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc.
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 2 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical application table 1: operation mode power source acok __________ en mode operating mode high charge mode, enable charging 0.8vv batt +300mv low low x charge mode, disable charging pwin<0.8v or pw in >1.15v or v in MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 3 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. ordering information part number* package top marking MP2633gr qfn24 (44mm) m2633e * for tape & reel, add suffix ?z (e.g. MP2633gr?z); package reference top view absolute maxi mum ratings (1) vin .................................................?0.3v to 20v sys, sw .......................................?0.3v to 6.5v batt.............................................?0.3v to 6.5v acok ----------------- , chg ------------- , boost --------------------- ...................?0.3v to 6.5v all other pins ................................?0.3v to 6.5v junction temperature ...............................150c lead temperature ....................................260c continuous power dissipation (t a = +25c) (2) ........................................................... 2.97w junction temperature ...............................150c operating temperature............. ?20c to +85c recommended operating conditions (3) supply voltage vin............................4.5v to 6v battery voltage v out .....................2.5v to 4.35v operating junction temp. (t j ). ? 40c to +125c thermal resistance (4) ja jc qfn24 (44mm)..................... 42 ........9 ....c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 4 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics v in = 5.0v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units in to sys nmos on resistance r in to sys 100 m ? high-side pmos on resistance r h_ds 72 m ? low-side nmos on resistance r l_ds 70 m ? cc charge mode/boost mode 4 a high-side pmos peak current limit i peak_hs tc charge mode 1.5 a low-side nmos peak current limit i peak_ls 4.5 a freq = 0 600 switching frequency f sw freq = float/ high 1200 khz vcc uvlo v cc_uvlo 2 2.2 2.4 v vcc uvlo hysteresis 100 mv pwin, lower threshold v pwin_l 0.75 0.8 0.85 v lower threshold hysteresis 40 mv pwin, upper threshold v pwin_h 1.1 1.15 1.2 v upper threshold hysteresis 65 mv charge mode en = 5v, battery float 2.5 ma input quiescent current i in en = 0 1.5 ma r llim = 90.9k 400 450 500 r llim = 49.9k 720 810 900 input current limit i in_limit r llim = 20k 1800 2000 2200 ma input over-current threshold i in(ocp) 3 a input over-current blanking time (5) inocblk 120 s input over-current recovery time (5) inrecvr 100 ms connect vb to gnd 3.582 3.6 3.618 terminal battery voltage v batt_full leave vb floating or connect to logic high 4.179 4.2 4.221 connect to vb to gnd 3.39 3.44 3.49 v recharge threshold v rech leave vb floating or connect to logic high 3.95 4.01 4.07 v recharge threshold hysteresis 200 mv battery over voltage threshold 103.3% v batt_full rs1 = 40m ? , r iset = 69.8k 900 1000 1100 constant charge (cc) current i cc rs1 = 40m ? , r iset = 46.4k 1350 1500 1650 ma trickle-charge current i tc 230 ma
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 5 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics (continued) v in = 5.0v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units connect to vb to gnd 2.47 2.57 2.67 trickle-charge voltage threshold v batt_tc leave vb floating or connect to high logic 2.9 3 3.1 v trickle-charge hysteresis 200 mv termination charge current i bf rs1=40m, r iset =69.8k 2.5% 10% 17.5% i cc input-voltage-regulation reference v reg 1.18 1.2 1.22 v boost mode sys voltage range 4.2 6 v feedback voltage 1.18 1.2 1.22 v feedback input current v fb =1v 200 na boost sys over-voltage protection threshold v sys(ovp ) threshold over v sys to turn off the converter during boost mode 5.8 6 6.2 v sys over-voltage protection threshold hysteresis v sys falling from v sys(ovp) 125 mv boost quiescent current i sys = 0, mode = 5v 1.4 ma programmable boost output current limit accuracy i olim rs1 = 40m ? , r olim = 100k 1 1.2 1.44 a programmable boost output current (5) rs1 = 50m ? , rolim=63.4k 1.5 a sys over-current blanking time (5) sysocblk 120 s sys over-current recovery time (5) sysrecvr 1 ms during boost mode 2.5 v weak-battery threshold v batt(low) before boost mode 2.9 3.05 v sleep mode battery leakage current i leakage v batt = 4.2v, sys float, v in = 0v, mode = 0v 15 30 a indication and logic acok ---------------- , chg ------------ , boost ------------------- pin output low voltage sinking 1.5ma 400 mv acok ---------------- , chg ------------ , boost ------------------- pin leakage current connected to 5v 1 a ntc and time-out fault blinking frequency (5) c tmr =0.1 f, i chg =1a 13.7 hz en input logic low voltage 0.4 v en input high voltage 1.4 v mode input logic low voltage 0.4 v mode input logic high voltage 1.4 v
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 6 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. electrical characteristics (continued) v in = 5.0v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units protection trickle-charge time c tmr =0.1f, remains in tc mode, i chg = 1a 60 min total charge time c tmr =0.1f, i chg = 1a 360 min ntc low temp, rising threshold 65% 66% 67% ntc low temp, rising threshold hysteresis r ntc =ncp18xh103(0c) 1% ntc high temp, rising threshold 34% 35% 36% ntc high temp, rising threshold hysteresis r ntc =ncp18xh103(50c) 1% v sys charging current fold-back threshold (5) charge mode 120 c thermal shutdown threshold (5) 150 c notes: 5) guaranteed by design.
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 7 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical characteristics c in =c batt =c sys =c3=22f, c1=c2=1f, l1=4.7h, rs1=50m ? , c4=c tmr =0.1f, battery simulator, unless otherwise noted. charge current (a) switching frequency (khz) charge current vs. temeprature, charge mode v in =5v, v batt_full =4.2v, v batt =3.7v, i chg =1.5a switching frequency vs. battery voltage, charge mode v in =5v, v batt_full =4.2v, i chg =2a battery voltage (v) input voltage (v) i chg (a) r set (k) charge current vs. riset,charge mode v in =5v, v batt_full =4.2v, v batt =3.7v, f sw =1.2mhz 0 0.5 1 1.5 2 0 40 80 120 160 0 0.4 0.8 1.2 1.6 60 80 100 120 140 -3.00 -2.00 -1.00 0.00 1.00 4 4.5 5 5.5 6 0 200 400 600 800 1000 1200 0 0.5 1 1.5 2 2.5 1200k & 4.2v full 1200k & 3.6v full voltage (v) battery voltage (v) v cc @ boost mode voltage (v) input voltage (v) v cc @ charge mode 0 1 2 3 4 5 6 7 8 24 6 810 0 1 2 3 4 5 6 7 1357 v cc =sys v cc =sys input current limit setting (iin_lim vs. rilim) input current limit (a) 0 0.5 1 1.5 2 2.5 3 0 50 100 programmable output current limit (olim vs. rolim) batt=4.2v setting current (a) boost current limit (a) programmable output current limit vs. battery voltage r olim =73.2k, sys=5v battery voltage (v) 0 0.5 1.0 1.5 2.0 2.5 30 80 130 180 230 280 2.5 3.0 3.5 4.0 4.5 1.2 1.22 1.24 1.26 1.28 1.3
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 8 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics v in =5v, c in =c batt =c sys =c3=22f, c1=c2=1f, l1=2.2h, rs1=50m ? , c4=c tmr =0.1f, battery simulator, unless otherwise noted. v in 1v/div. v batt 1v/div. chgok 2v/div. i chg 1a/div. v in 1v/div. v batt 100mv/div. chgok 2v/div. i chg 1a/div. v sw 2v/div. v batt 200mv/div. chgok 5v/div. i l 200ma/div. v in 1v/div. v sw 2v/div. v batt 2v/div. i l 500ma/div. v in 1v/div. v sw 2v/div. v batt 2v/div. i l 1a/div. v in 1v/div. v sw 2v/div. v batt 2v/div. i l 1a/div. battery voltage (v) charge current (a) 50 60 70 80 90 100 012345 80 85 90 95 100 0 0.5 1 1.5 2
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 9 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in =5v, c in =c batt =c sys =c3=22f, c1=c2=1f, l1=2.2h, rs1=50m ? , c4=c tmr =0.1f, battery simulator, unless otherwise noted. v batt 2v/div. v in 2v/div. v sys 2v/div. i l 500ma/div. v batt 2v/div. v sys 2v/div. v in 2v/div. i l 500ma/div. v batt 2v/div. en 5v/div. v sys 2v/div. i l 1a/div. v batt 2v/div. v en 5v/div. v sys 2v/div. i l 1a/div. i chg 1a/div. i in 1a/div. v sys 2v/div. i sys 1a/div. v batt 1v/div. v in 1v/div. v sys 1v/div. i sys 2a/div. v batt 1v/div. v in 1v/div. v in 2v/div. v sys 1v/div. i sys 2a/div. v batt 1v/div. v sys 2v/div. power on, charge mode v batt_full =4.2v, v batt =3.7v, i chg =1.5a en off, charge mode v batt_full =4.2v, v batt =3.7v, i chg =1.5a system short protection v batt_full =4.2v, v batt =2v, f sw =600khz system short protection zoom in v batt_full =4.2v, v batt =2v, f sw =600khz input current limit v batt_full =4.2v, v batt =3.7v, i chg =1.5a power off, charge mode v batt_full =4.2v, v batt =3.7v, i chg =1.5a en on, charge mode v batt_full =4.2v, v batt =3.7v, i chg =1.5a i batt 500ma/div. v in 1v/div. v batt 2v/div. i sys 500ma/div. input voltage clamp @ 4.75v charge mode v in_regulation =4.75v, v batt_full =4.2v, v batt =3.7v, i chg =1.5a, increase isys 4.75v
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 10 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in =5v, c in =c batt =c sys =c3=22f, c1=c2=1f, l1=2.2h, rs1=50m ? , c4=c tmr =0.1f, battery simulator, unless otherwise noted.
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 11 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical performanc e characteristics (continued) v in =5v, c in =c batt =c sys =c3=22f, c1=c2=1f, l1=2.2h, rs1=50m ? , c4=c tmr =0.1f, battery simulator, unless otherwise noted. v batt 2v/div. v sys 2v/div. i l 1a/div. v batt 2v/div. v sys 2v/div. i l 1a/div. v batt 2v/div. v sys 2v/div. i l 1a/div. v batt 2v/div. v sys 2v/div. boost 2v/div. v batt 1v/div. v sys /ac 200mv/div. i sys 500ma/div. v batt 1v/div. v sys /ac 200mv/div. i sys 500ma/div. sys short entry boost mode v sys_set =5v, v batt =3.7v sys load transient, boost mode v sys_set =5v, v batt =3.7v, i sys = 100ma to 1a sys load transient, boost mode v sys_set =5v, v batt =3.7v, i sys = 500ma to 1a sys short steady state boost mode v sys_set =5v, v batt =3.7v sys short recovery boost mode v sys_set =5v, v batt =3.7v sys over voltage protection, boost mode v sys_set =6.5v, v batt =3.7v 30 40 50 60 70 80 90 100 0 0.25 0.5 0.75 1 0 0.25 0.5 0.75 1 v batt =4.2v v batt =2.9v v batt =3.7v 30 40 50 60 70 80 90 100 system current (a) system current (a) efficiency, boost mode v sys_set =5v, v sys =5v, f sw =1.2mhz efficiency, boost mode v sys_set =5v, v sys =5v, f sw =600khz v batt =4.2v v batt =2.9v v batt =3.7v system voltage (v) system current (a) boost output v-i curve batt=3.7v, sys=5v 0 1 2 3 4 5 6 0 0.5 1 1.5
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 12 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. pin functions pin # name description 1 freq connect to gnd to program the operating frequency to 600khz. leave floating or connect to high to program the operating frequency to 1.2mhz. 2 vin adapter input. place a bypass capacitor close to this pin to prevent large input voltage spikes. 3 vcc internal circuit power supply. bypass to g nd with a 100nf ceramic capacitor. this pin cannot carry any load. 4 ilim input current set. connect to gnd with an exter nal resistor to program input current limit in charge mode. 5 pwin ac input detect. detect t he presence of valid input power. 6 tmr oscillator period timer. connect a timing capacitor between this pin and gnd to set the oscillator period. short to gnd to disable the timer function. 7 reg input voltage feedback for input voltage regulation loop. connect to tap of an external resistor divider from vin to gnd to program the input voltage regulation. once the voltage at reg pin drops to the inner threshold, the charge current is reduced to maintain the input voltage at the regulation value. 8 acok ---------------- valid input supply indicator. logic low indica tes the presence of a valid power supply. 9 fb system voltage feedback. 10 ntc negative temperature co efficient (ntc) thermistor. 11 iset charge current set. connect an external resistor to gnd to program the charge current. 12 olim boost-output-current limit set. connect an exte rnal resistor to gnd to program the system current in boost mode. 13 agnd analog ground 14 vb programmable battery-full voltage. connect to gnd for 3.6v. leave floating or connect to logic high for 4.2v. 15 batt positive battery terminal / batte ry charge current s ense negative input. 16 csp battery charge current sense, positive input. 17 boost ------------------- boost mode indicator. logic low indicates bo ost mode in operation. this pin becomes an open drain when the part operates in charge mode or sleep mode. 18 chg ------------ charge completion indicator. logic low indicates charge mode. the pin becomes an open drain once the charging has completed or is suspended. 19 pgnd, exposed pad power ground. connect the exposed pad and gnd pin to the same ground plane. 20 sw switch output node. 21, 22 sys system output. please make sure the enough bulk capacitors from sys to gnd. suggest 4.7uf at least. 23 mode mode select. logic high boost mode. logic low sleep mode. active only when acok __________ is high (input power is not available). 24 en charge control input. logic high enables chargi ng. logic low disables charging. active only when acok __________ is low (input power is ok)
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 13 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. 0.8v 1.15v batt+ 300mv vcc pwin vin sys fb a1 a2 control logic& mode selection tmr sw vcc driver v batt gmi min gmv v batt_ref i chg_ref pwm controller current setting mode control gmini i in_ref gminv v reg_ref reg v batt mode gmt t ref t j ntc vsys sys indication& timer acok chg boost en pwm signal hsmos lsmos iset ilim olim freq agnd batt charge pump acok vb k1*i chg k2*i in csp current sense k1*i chg thermal shutdown v batt buffer q1 q2 pgnd figure 1: functional block diagram in charge mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 14 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. 0.8v 1.15v batt+ 300mv vcc pwin vin sys fb a1 a2 control logic& mode selection tmr sw vcc driver v batt gmv pwm controller current setting mode control gmini reg mode ntc indication& timer acok chg boost en pwm signal hsmos lsmos iset ilim olim freq agnd batt charge pump acok vb csp v batt v sys_ref v fb k3*i sys i olim_ref integration to current setting thermal shutdown q1 q2 pgnd figure 2: functional block diagram in boost mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 15 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation flow chart por v cc v batt +300mv yes no mode high? no no boost mode /boost low yes /acok is low, system powered by in yes en high? no charger mode /chg low yes sleep mode figure 3: mode selection flow chart
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 16 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation flow chart (continued) figure 4: normal operation and fault protection in charge mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 17 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation flow chart (continued) normal operation power path management i in hit the i in_limit ? charge current decrease i chg =0? sys output current increase no yes no yes v pwin touch the v reg ? yes no i in exceeds i in(ocp) ? no in to sys mosfet turns off yes t inocblk reaches? no t inrecvr reaches? regulate the i in at i in(ocp) yes i in >7a? no no yes yes figure 5: power-path management in charge mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 18 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation flow chart (continued) boost mode /boost low v batt >2.9v? no yes normal boost operation mode high? no yes v batt <2.5v? no boost turns off yes normal boost operation i sys > i olim ? output current loop works, v sys decreases v sys < v batt ? yes v sys < 2v? yes yes i l hits the current limit no boost shutdown t sysrecvr reaches? down mode no t sysblk reaches? no no yes no yes yes figure 6: operation flow chart in boost mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 19 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. start up time flow in charge mode condition: en = 5v, mode = 0v, /acok and /chg are always pulled up to an external constant 5v v in ss force charge aut o-recharge t hreshold i bf comparator auto- recharge v sys acok band gap 0v 0v v pwi n > 0.8v & v in > v batt + 300mv v sys > v batt + 50mv 0v 5v chg 0v 5v 0a i cc 10%i cc battery voltage v batt_full 150 s assume v batt > v batt_tc 150 s 0v 5v mode en v cc 2.2v charge current v cc follows v in 0v 400 s 400 s figure 7: input power start-up time flow in charge mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 20 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. start up time flow in charge mode condition: v in = 5v, mode = 0v, /acok and /chg are alwa ys pulled up to an external constant 5v. v in ss force charge i bf comparator auto- recharge v sys acok band gap 0v 0v 0v 5v chg 0v 5v 0a i cc 10%i cc battery voltage v batt_full 150 s assume v batt > v batt_tc 150 s 0v 5v mode en v cc 2.2v charge current 0v 400 s 400 s 150 s 400 s figure 8: en start-up time flow in charge mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 21 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. start up time flow in boost mode condition: v in = 0v, mode = 5v, /boost is always pulled up to an external constant 5v. mode boost ss v cc band gap v sys v batt 2.2v boost 0v 2.9v v sys >v batt +300mv 0v 0v 5v down mode 2.5v 0v v cc follows v batt v cc follows v sys 1.2ms figure 9: battery power start-up time flow in boost mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 22 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. start up time flow in boost mode condition: v in = 0v, /boost is always pulled up to an external constant 5v. mode boost ss v cc band gap v sys v batt 2.2v boost 2.9v v sys >v batt +300mv 0v 0v 5v down mode 0v 5v 0v 5v v cc follows v batt v cc follows v sys 1.2ms figure 10: mode start-up time flow in boost mode
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 23 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. operation introduction the MP2633 is a highly-integrated, synchronous, switching charger with bi-directional operation for a boost function that can step-up the battery voltage to power the system. depending on the vin value, it operates in one of three modes: charge mode, boost mode and sleep mode. in charge mode, the MP2633 supports a precision li-ion or li-polymer charging system for single- cell applications. in boost mode, MP2633 boosts the battery voltage to v sys to power higher- voltage systems. in sleep mode, the MP2633 stops charging or boosting and operates at a low current from the input or the battery to reduce power consumption when the ic isn?t operating. the MP2633 monitors vin to allow smooth transition between different modes of operation. charge mode operation charge cycle (trickle charge ? cc charge ? cv charge) in charge mode, the MP2633 has five control loops to regulate the input current, input voltage, charge current, charge voltage, and device junction temperature. it charges the battery in three phases: trickle current (tc), constant current (cc), and constant voltage (cv). while charging, all four loops are active but only one determines the ic behavior. figure 11(a) shows a typical battery charge profile. the charger stays in tc charge mode until the battery voltage reaches a tc-to-cc threshold. otherwise the charger enters cc charge mode. when the battery voltage rises to the cv-mode threshold, the charger operates in constant voltage mode. figure 11 (b) shows a typical charge profile when the input-current-limit loop dominates during the cc charge mode, and in this case the charge current exceeds the input current, resulting in faster charging than a traditional linear solution that is well-suited for usb applications. auto-recharge once the battery charge cycle completes, the charger remains off. during this process, the system load may consume battery power, or the battery may self discharge. to ensure that the battery will not go into depletion, a new charge cycle automatically begins when the battery trickle charge tc>>>cc threshold cc>>>cv threshold cc charge cv charge i chg v bat charge full trickle charge current constant charge current a) without input current limit trickle charge tc>>>cc threshold cc>>>cv threshold cc charge cv charge i chg v bat charge full trickle charge current input current limit constant charge current b) with input current limit figure 11: typical battery charginge profile voltage falls below the auto-recharge threshold and the input power is present. the timer resets when the auto-recharge cycle begins. during the off state after the battery is fully charged, if the input power re-starts or the en signal refreshes, the charge cycle will start and the timer will reset no matter what the battery voltage is. battery over-voltage protection the MP2633 has battery over-voltage protection. if the battery voltage exceeds the battery over- voltage threshold, (103.3% of the battery-full voltage), charging is disabled. under this condition, an internal current source draws a current from the batt pin to decrease the battery voltage and protect the battery. timer operation in charge mode the MP2633 uses an internal timer to terminate the charging. the timer remains active during the charging process. an external capacitor between tmr and gnd programs the charge cycle duration.
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 24 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. if charging remains in tc mode beyond the trickle-charge time total_tmr , charging will terminate. the following determines the length of the trickle-charge period: tmr trickle _ tmr chg c(f) 1a 60mins 0.1 f i (a) = (1) the maximum total charge time is: tmr total _ tmr chg c(f) 1a 6hours 0.1 f i (a) = (2) negative temperature coefficient (ntc) input for battery temperature monitoring the MP2633 has a built-in ntc resistance window comparator, which allows the MP2633 to monitor the battery temperature via the battery- integrated thermistor. connect an appropriate resistor from v sys to the ntc pin and connect the thermistor from the ntc pin to gnd. the resistor divider determines the ntc voltage depending on the battery temperature. if the ntc voltage falls outside of the ntc window, the MP2633 stops charging. the charger will then restart if the temperature goes back into ntc window range. input-current limiting in charge mode the MP2633 has a dedicated pin that programs the input-current limit. the current at ilim is a fraction of the input current; the voltage at ilim indicates the average input current of the switching regulator as determined by the resistor value between ilim and gnd. as the input current approaches the programmed input current limit, charge current is reduced to allow priority to system power. use the following equation to determine the input current limit threshold, ilim ilim 40.5(k ? ) i= (a) r(k ? ) (3) input over-current protection the MP2633 features input over-current protection (ocp): when the input current exceeds 3a, q2 is controlled linearly to regulate the current. if the current still exceeds 3a after a 120s blanking time, q2 will turn off. a fast off function turns off q2 quickly when the input current exceeds 7a to protect both q1 and q2. input voltage regulation in charge mode in charge mode, if the input power source is not sufficient to support both the charge current and system load current, the input voltage will decrease. as the input voltage approaches the programmed input voltage regulation value, charge current is reduced to allow priority of system power and maintain the input voltage avoid dropping further. the input voltage can be regulated by a resistor divider from vin pin to reg pin to agnd according to the following expression: 5 r 5 r 3 r v v reg r _ in + = (4) where: the vreg is the internal voltage reference, 1.2v. setting the charge current the external sense resistors, rs1 and r iset , program the battery charge current, i chg . select r iset based on rs1: chg iset 70(k ? ) 40(mv) i(a)= r(k ? )rs1(m ? ) (5) where: the 40mv is the charge current limit reference. battery short protection the MP2633 has two current limit thresholds. cc and cv modes have a peak current limit threshold of 3a, while tc mode has a current limit threshold of 1.5a. therefore, the current limit threshold decreases to 1.5a when the battery voltage drops below the tc threshold. moreover, the switching frequency also decreases when the batt voltage drops to 40% of the charge-full voltage. thermal foldback function the MP2633 implements thermal protection to prevent thermal damage to the ic and the surrounding components. an internal thermal sense and feedback loop automatically decreases the programmed charge current when the die temperature reaches 120c. this function is called the charge-current-thermal foldback. not only does this function protect against thermal damage, it can also set the charge current based
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 25 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. on requirements rather than worst-case conditions while ensuring safe operation. furthermore, the part includes thermal shutdown protection where the ceases charging if the junction temperature rises to 150c. fully operation indication the MP2633 integrates indicators for the following conditions as shown in table 2. table 2: indicator for each operation mode operation acok ---------------- chg ------------ boost ------------------- charging low end of charge, charging disabled high charge mode ntc fault, timer out low blinking high boost mode high high low sleep mode, vcc absent high high high boost mode operation low-voltage start-up the minimum battery voltage required to start up the circuit in boost mode is 2.9v. initially, when v sys < v batt , the MP2633 works in down mode. in this mode, the synchronous p-mosfet stops switching and its gate connects to v batt statically. the p_mosfet keeps off as long as the voltage across the parasitic c ds (v sw ) is lower than v batt . when the voltage across c ds exceeds v batt , the synchronous p-mosfet enters a linear mode allowing the inductor current to decrease and flowing into the sys pin. once v sys exceeds v batt , the p-mosfet gate is released and normal closed-loop pwm operation is initiated. in boost mode, the battery voltage can drop to as low as 2.5v without affecting circuit operation. sys disconnect and inrush limiting the MP2633 allows for true output disconnect by eliminating body diode conduction of the internal p-mosfet rectifier. v sys can go to 0v during shutdown, drawing no current from the input source. it also allows for inrush current limiting at start-up, minimizing surge currents from the input supply. to optimize the benefits of output disconnect, avoid connecting an external schottky diode between the sw and sys pins. board layout is extremely critical to minimize voltage overshoot at the sw pin due to stray inductance. keep the output filter capacitor as close as possible to the sys pin and use very low esr/esl ceramic capacitors tied to a good ground plane. boost output voltage in the boost mode, the MP2633 programs the output voltage via the external resistor divider at fb pin, and provides built-in output over-voltage protection (ovp) to protect the device and other components against damage when v sys goes beyond 6v. should output over-voltage occur, the MP2633 turns off the boost converter. once v sys drops to a normal level, the boost converter restarts again as long as the mode pin remains in active status. boost output-current limiting the MP2633 integrates a programmable output current limit function in boost mode. if the boost output current exceeds this programmable limit threshold, the output current will be limited at this level and the sys voltage will start to drop down. the olim pin programs the current limit threshold up to 1.5a as per the following equation: 7 . 1 ) m (( 1 rs ) mv ( 40 ) k ( r ) k ( 70 ) a ( i olim olim = (6) where: the 40mv is the charge current limiting reference. sys output over current protection the MP2633 integrates three-phase output over- current protection. phase one (boost mode): when the output current exceeds the output current limit, the
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 26 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. output constant current loop controls the output current, the output current remains at its limit of i olim , and v sys decreases. phase two (down mode): when v sys drops below v batt +100mv and the output current loop remains in control, the boost converter enters down mode and shutdown after a 120 s blanking time. phase three (short circuit mode): when v sys drops below 2v, the boost converter shuts down immediately once the inductor current hits the fold-back peak current limit of the low side n- mosfet. the boost converter can also recover automatically after a 1ms deglitch period. thermal shutdown protection thermal shutdown protection is also active in boost mode. once the junction temperature rises higher than 150c, the MP2633 enters thermal shutdown. it will not resume normal operation until the junction temperature drops below 120c.
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 27 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. application information component selection setting the charge current in charge mode in charge mode, both the external sense resistor, rs1, and the resistor r iset connect to the iset pin to set the charge current (ichg) of the MP2633 (see the typical application circuit). given i chg and rs1, the regulation threshold, v iref , across this resistor is: ) a ( i ) m ( 1 rs ) mv ( v chg iref = (7) r iset sets v iref as per the following equation: ) mv ( 40 ) k ( r ) k ( 70 ) mv ( v iset iref = ( 8 ) so, the r iset can be calculated as: ) mv ( 40 ) mv ( v ) k ( 70 ) k ( r iref iset = ( 9 ) for example, for i chg =1.5a and rs1=50m ? : v iref =75mv, so r iset =37.4k ? . setting the input current limiting in charge mode in charge mode, connect a resistor from the ilim pin to agnd to program the input current limit. the relationship between the input current limit and setting resistor is: ) k ( ) a ( i 5 . 40 r lim _ in ilim = (10) where r ilim must exceed 20k ? so that iin_lim is in the range of 0a to 2a. for most applications, use r ilim = 45k ? (i usb_lim =900ma) for usb3.0, and use an r lim = 81k ? (i usb_lim =500ma) for usb2.0. setting the input voltage range for different operation modes a resistive voltage divider from the input voltage to pwin pin determines the operating mode of MP2633. ) v ( 6 r 4 r 6 r v v in pwin + = ( 11 ) if the voltage on pwin is between 0.8v and 1.15v, the MP2633 works in the charge mode. while the voltage on the pwin pin is not in the range of 0.8v to 1.15v and vin > 2v, the MP2633 works in the boost mode (see mps. all rights reserved. ). for a wide operating range, use a maximum input voltage of 6v as the upper threshold for a voltage ratio of: 6 r 4 r 6 r 6 15 . 1 v v in pwin + = = (12) with the given r6, r4 is then: 6 r v v v 4 r pwin pwin in ? = ( 13 ) for a typical application, start with r6=5.1k ? , r4 is 21.5k ? . setting the input voltage regulation in charge mode in charge mode, connect a resistor divider from the vin pin to agnd with tapped to reg pin to program the input voltage regulation. 5 r 5 r 3 r v v reg r _ in + = (14) with the given r5, r3 is: 5 r v v v 3 r reg rge r _ in ? = (15) for a preset input voltage regulation value, say 4.75v, start with r5=5.1k ? , r3 is 15k ? . ntc function in charge mode figure 12 shows that an internal resistor divider sets the low temperature threshold (v tl ) and high temperature threshold (v th ) at 65%v sys and 35%v sys , respectively. for a given ntc thermistor, select an appropriate rt1 and rt2 to set the ntc window. % 65 tl //r r r //r r v v ntc_cold t2 t1 ntc_cold t2 sys tl = = + = (16)
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 28 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. % 35 th //r r r //r r v v ntc_hot t2 t1 ntc_hot t2 sys th = = + = (17) where r ntc_hot is the value of the ntc resistor at the upper bound of its operating temperature range, and r ntc_cold is its lower bound. the two resistors, r t1 and r t2 , independently determine the upper and lower temperature limits. this flexibility allows the MP2633 to operate with most of ntc resistors for different temperature range requirements. calculate r t1 and r t2 as follows: ) r r ( tl th ) th tl ( r r r ntc_hot ntc_cold ntc_cold ntc_hot t1 ? ? = (18) ntc_hot ntc_cold ntc_hot ntc_cold t2 r tl th) - (1 - r th ) tl 1 ( r r ) th tl ( r ? ? = (19) for example, the ncp18xh103 thermistor has the following electrical characteristic: at 0c, r ntc_cold = 27.445k ? ; at 50c, r ntc_hot = 4.1601k ? . based on equation (18) and equation (19), rt1=6.47k ? and rt2 = 21.35k ? are suitable for an ntc window between 0c and 50c. chose approximate values: e.g., r t1 =6.49k ? and r t2 =21.5k ? . if no external ntc is available, connect r t1 and r t2 to keep the voltage on the ntc pin within the valid ntc window: e.g., r t1 = r t2 = 10k ? . ntc sys low temp threshold high temp threshold r ntc r t1 r t2 v tl v th figure 12: ntc function block setting the system voltage in boost mode in the boost mode, the system voltage can be regulated to the value customer required between 4.2v to 6v by the resistor divider at fb pin as r1 and r2 in the typical application circuit. 2 r 2 r 1 r v 2 . 1 v sys + = (20) where 1.2v is the voltage reference of sys. with a typical value for r2, 10k ? , r1 can be determined by: ) v ( v 2 . 1 v 2 . 1 v 2 r 1 r sys ? = (21) for example, for a 5v system voltage, r2 is 10k ? , and r1 is 31.6k ? . setting the output current limit in boost mode in boost mode, connect a resistor from the olim pin to agnd to program the output current limit. the relationship between the output current limit and setting resistor is as follows: 7 . 1 ) m ( 1 rs ) a ( i ) mv ( 40 ) k ( 70 ) k ( r olim olim = (22) where r olim is greater than 63.4k ? , so i olim can be programmed up to 1.5a. selecting the inductor inductor selection trades off between cost, size, and efficiency. a lower inductance value corresponds with smaller size, but results in higher ripple currents, higher magnetic hysteretic losses, and higher output capacitances. however, a higher inductance value benefits from lower ripple current and smaller output filter capacitors, but results in higher inductor dc resistance (dcr) loss. choose an inductor that does not saturate under the worst-case load condition. 1. charge mode when MP2633 works in charge mode (as a buck converter), estimate the required inductance as: s in batt max _ l batt in f v v i v v l ? = ( 23 ) where v in , v batt , and f s are the typical input
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 29 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. voltage, the cc charge threshold, and the switching frequency, respectively. i l_max is the maximum inductor ripple current, which is usually designed at 30% of the cc charge current. with a typical 5v input voltage, 30% inductor current ripple at the corner point between trickle charge and cc charge (v batt =3v), the inductance is 1.85 h (for a 1.2mhz switching frequency), and 3.7h (for a 600khz switching frequency). 2. boost mode when the MP2633 is in boost mode (as a boost converter), the required inductance value is calculated as: max _ l s sys batt sys batt i f v ) v v ( v l ? = (24) ) max ( batt max _ l i %) 40 % 30 ( i ? = (25) = batt sys sys ) max ( batt v i v i (26) where v batt is the minimum battery voltage, f sw is the switching frequency, and ? i l_max is the peak-to-peak inductor ripple current, which is approximately 30% of the maximum battery current, i batt(max) . i sys(max) is the system current and is the efficiency. in the worst case where the battery voltage is 3v, a 30% inductor current ripple, and a typical system voltage (v sys =5v), the inductance is 1.8 h (for the 1.2mhz switching frequency) and 3.6h (for the 600khz switching frequency) when the efficiency is 90%. for best results, use an inductor with an inductance of 1.8 h (for the 1.2mhz switching frequency) and 3.6h (for the 600khz switching frequency) with a dc current rating that is at least 30% higher than the maximum charge current for applications. for higher efficiency, minimize the inductor?s dc resistance. selecting the input capacitor, c in the input capacitor c in reduces both the surge current drawn from the input and the switching noise from the device. the input capacitor impedance at the switching frequency should be less than the input source impedance to prevent high-frequency-switching current from passing to the input. for best results, use ceramic capacitors with x5r or x7r dielectrics because of their low esr and small temperature coefficients. for most applications, a 22f capacitor will suffice. selecting the system capacitor, c sys select c sys based on the demand of the system current ripple. 1. charge mode the capacitor c sys acts as the input capacitor of the buck converter in charge mode. the input current ripple is: max _ in tc max _ in tc max _ sys max _ rms v ) v v ( v i i ? = (27) 2. boost mode the capacitor, c sys , is the output capacitor of boost converter. c sys keeps the system voltage ripple small and ensures feedback loop stability. the system current ripple is given by: max _ sys tc max _ sys tc max _ sys max _ rms v ) v v ( v i i ? = (28) since the input voltage passes to the system directly, v in_max =v sys_max , both charge mode and boost mode have the same system current ripple. for i cc_max =2a, v tc =3v, v in_max =6v, the maximum ripple current is 1a. select the system capacitors base on the ripple-current temperature rise not exceeding 10c. for best results, use ceramic capacitors with x5r or x7r dielectrics with low esr and small temperature coefficients. for most applications, use a 22f capacitor. selecting the battery capacitor, c batt c batt is in parallel with the battery to absorb the high-frequency switching ripple current. 1. charge mode the capacitor c batt is the output capacitor of the buck converter. the output voltage ripple is then:
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 30 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. l f c 8 v / v 1 v v r 2 s batt sys batt batt batt batt ? = = (29) 2. boost mode the capacitor c batt is the input capacitor of the boost converter. the input voltage ripple is the same as the output voltage ripple from equation (29). both charge mode and boost mode have the same battery voltage ripple. the capacitor c batt can be calculated as: l f r 8 v / v 1 c 2 s max _ batt max _ sys tc batt ? = (30) to guarantee the 0.5% batt voltage accuracy, the maximum batt voltage ripple must not exceed 0.5% (e.g., 0.1%). the worst case occurs at the minimum battery voltage of the cc charge with the maximum input voltage. for v sys_max =6v, v cc_min =v tc =3v, l=3.9h, f s =600khz or 1.2mhz, % 1 . 0 r max _ batt = , c batt is 22f (for a 600khz switching frequency) or 10f (for a 1.2mhz switching frequency). a 22f ceramic with x5r or x7r dielectrics capacitor in parallel with a 220uf electrolytic capacitor will suffice. pcb layout guide pcb layout is very important to meet specified noise, efficiency and stability requirements. the following design considerations can improve circuit performance: 1) route the power stage adjacent to their grounds. aim to minimize the high-side switching node (sw, inductor) trace lengths in the high- current paths and the current sense resistor trace. keep the switching node short and away from all small control signals, especially the feedback network. place the input capacitor as close as possible to the vin and pgnd pins. the local power input capacitors, connected from the sys to pgnd, must be placed as close as possible to the ic. place the output inductor close to the ic and connect the output capacitor between the inductor and pgnd of the ic. 2) for high-current applications, the power pads for in, sys, sw, batt and pgnd should be connected to as many copper planes on the board as possible. the exposed pad should connect to as many gnd copper planes in the board as possible. this improves thermal performance because the board conducts heat away from the ic. 3) the pcb should have a ground plane connected directly to the return of all components through vias (e.g., two vias per capacitor for power-stage capacitors, one via per capacitor for small-signal components). if possible, add vias inside the exposed pads for the ic. a star ground design approach is typically used to keep circuit block currents isolated (power-signal/control- signal), which reduces noise-coupling and ground-bounce issues. a single ground plane for this design gives good results. 4) place iset, olim and ilim resistors very close to their respective ic pins. top layer bottom layer figure 13 pcb layout guide
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 31 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. design example below is a design example following the application guidelines for the specifications: table 3: design example v in 5v v out 3.7v f sw 1200khz figure14 shows the detailed application schematic. the typical performance characteristics section shows the typical performance and circuit waveforms. for more possible applications of this device, please refer to the related evaluation board datasheets.
MP2633 ? 1.5a single cell switch mode battery charger MP2633 rev. 1.05 www.monolithicpower.com 32 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. typical application circuits figure14: detailed application circuit
MP2633 ? 1.5a single cell switch mode battery charger notice: the information in this document is subject to change wi thout notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP2633 rev. 1.05 www.monolithicpower.com 33 4/19/2013 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2013 mps. all rights reserved. package information qfn24 (4x4mm) side view top view 1 24 19 18 13 12 7 6 bottom view 3.90 4.10 2.50 2.80 3.90 4.10 2.50 2.80 0.50 bsc 0.18 0.30 0.80 1.00 0.00 0.05 0.20 ref pin 1 id marking 2.70 0.25 recommended land pattern 3.90 note: 1) all dimensions are in millimeters . 2) exposed paddle size does not include mold flash . 3) lead coplanarity shall be 0.10 millimeter max. 4) drawing confirms to jedec mo-220, variation vggd. 5) drawing is not to scale. pin 1 id see detail a pin 1 id option a 0.30x45 o typ. pin 1 id option b r0.25 t yp. detail a pin 1 id index area 0.70 0.35 0.45 0.50


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